drm/amd/display: Optimize subvp and drr validation
authorDillon Varone <Dillon.Varone@amd.com>
Fri, 9 Dec 2022 22:59:21 +0000 (17:59 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 17 Jan 2023 20:37:38 +0000 (15:37 -0500)
commit59b7e458edde16d03b2c131e76121f261509dcc2
tree31a753facf5e9361bad4912ca44bd0a11f18ebfc
parent19d88e1df06c9c27b4a2ec59b36865892c624ef7
drm/amd/display: Optimize subvp and drr validation

Two issues existed:
1) Configs that support DRR, but have it disabled will fail subvp+vblank
validation incorrectly. Use subvp+vblank path for this case.
2) Configs that support DRR and have it enabled can use higher voltage level
than required if they also support subvp+vblank. Use lowest supported voltage
level for this case.

Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com>
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c