x86/cpu: Restore AMD's DE_CFG MSR after resume
authorBorislav Petkov <bp@suse.de>
Mon, 14 Nov 2022 11:44:01 +0000 (12:44 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 16 Nov 2022 08:58:31 +0000 (09:58 +0100)
commit599b24eedf2a3ce7fbf51cdb4aba684ca22c8290
tree1ee77fb17d1b3fe0747d788efbd88c5916bba839
parent9132fa043f96ac545254ab326db5c6fd47d54acb
x86/cpu: Restore AMD's DE_CFG MSR after resume

commit 2632daebafd04746b4b96c2f26a6021bc38f6209 upstream.

DE_CFG contains the LFENCE serializing bit, restore it on resume too.
This is relevant to older families due to the way how they do S3.

Unify and correct naming while at it.

Fixes: e4d0e84e4907 ("x86/cpu/AMD: Make LFENCE a serializing instruction")
Reported-by: Andrew Cooper <Andrew.Cooper3@citrix.com>
Reported-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: <stable@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/include/asm/msr-index.h
arch/x86/kernel/cpu/amd.c
arch/x86/kernel/cpu/hygon.c
arch/x86/kvm/svm/svm.c
arch/x86/kvm/x86.c
arch/x86/power/cpu.c
tools/arch/x86/include/asm/msr-index.h