projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 6b74eab) | patch
[DAGCombine][PowerPC] Convert negated abs to trivial arithmetic ops
authorKai Luo <lkail@cn.ibm.com>
Tue, 24 Nov 2020 08:17:46 +0000 (08:17 +0000)
committerKai Luo <lkail@cn.ibm.com>
Tue, 24 Nov 2020 09:43:35 +0000 (09:43 +0000)
commit5931be60b5238e5e134fcde75eb2d8121f3dca82
tree696d9b671497d24a3a3a7675dc5dab6e9100d691tree | snapshot
parent6b74eabfddbc6629adbf6358f8e78893c4ee1d12commit | diff
[DAGCombine][PowerPC] Convert negated abs to trivial arithmetic ops

This patch converts `0 - abs(x)` to `Y = sra (X, size(X)-1); sub (Y, xor (X, Y))` for better codegen.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D91120
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff | blob | history
llvm/test/CodeGen/AArch64/neg-abs.ll diff | blob | history
llvm/test/CodeGen/PowerPC/neg-abs.ll diff | blob | history
llvm/test/CodeGen/RISCV/neg-abs.ll diff | blob | history
Domain: System / Toolchain;