projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 66d60e0) | patch
AMDGPU: Fix verifier error on spilling partially defined SGPRs
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 24 Jul 2020 01:11:04 +0000 (21:11 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 29 Jul 2020 00:01:57 +0000 (20:01 -0400)
commit592f2e8d1ceb8ecec6f8b54eeb9fd7e0a099c0fe
tree76cd940ab54f9dd773b85c47b6df1daa753f99c8tree | snapshot
parent66d60e06cbc51b453f9e38ad69795f9487213fe5commit | diff
AMDGPU: Fix verifier error on spilling partially defined SGPRs

This needs an implicit def of the super-register in case one of the
lanes isn't defined, similar to copyPhysReg (or the not-VGPR spill
case below). This showed up in GlobalISel testing since it currently
doesn't fold out many undef instructions.
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp diff | blob | history
llvm/test/CodeGen/AMDGPU/sgpr-spill-partially-undef.mir [new file with mode: 0644] blob
Domain: System / Toolchain;