projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 2c8f5bd) | patch
Fix DRR pattern when attributes and operands are interleaved and a dag subtree appear...
authorMehdi Amini <joker.eph@gmail.com>
Wed, 30 Dec 2020 00:19:31 +0000 (00:19 +0000)
committerMehdi Amini <joker.eph@gmail.com>
Wed, 30 Dec 2020 00:19:38 +0000 (00:19 +0000)
commit58ce477676c7bd9c6cee0c6d05f2708b4e178ff3
treeadd29cf2fbb7e2346a911777c06f63d1822953f9tree | snapshot
parent2c8f5bd53945a209cd3cd851c63df3713fa0f9bdcommit | diff
Fix DRR pattern when attributes and operands are interleaved and a dag subtree appears in the rewrite

This fixes an incorrect fatal error in TableGen. This code probably comes
from before attributes were allowed to interleave with operands in ODS.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D93915
mlir/test/mlir-tblgen/rewriter-indexing.td diff | blob | history
mlir/tools/mlir-tblgen/RewriterGen.cpp diff | blob | history
Domain: System / Toolchain;