[ARM/AArch64] Improve modeled latency between FP operations and FP->GP register moves
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Tue, 18 Nov 2014 16:26:02 +0000 (16:26 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Tue, 18 Nov 2014 16:26:02 +0000 (16:26 +0000)
commit58bd290e5b19164a956e08ffadc3684640c61e39
tree860fa677c2ffb4af460b210fd65759f0807666f5
parent7b69b603ec8f75d1132849f7604667596811d74e
[ARM/AArch64] Improve modeled latency between FP operations and FP->GP register moves

* config/arm/cortex-a15-neon.md (cortex_a15_vfp_to_from_gp):
Split into...
(cortex_a15_gp_to_vfp): ...This.
(cortex_a15_fp_to_gp): ...And this.
Define and comment bypass from vfp operations to fp->gp moves.

From-SVN: r217725
gcc/ChangeLog
gcc/config/arm/cortex-a15-neon.md