[AMDGPU] Resolve pseudo registers at encoding uses
authorJoe Nash <Joseph.Nash@amd.com>
Tue, 3 Nov 2020 22:26:29 +0000 (17:26 -0500)
committerJoe Nash <Joseph.Nash@amd.com>
Wed, 4 Nov 2020 17:52:32 +0000 (12:52 -0500)
commit58adab34c4801e835bf1a55efbd1213b201660fb
treeeeda26691781fe4642ce2264ee93d47e7b2c70a8
parentbbeb08497ce5816bcd92989e21eea632993f8cea
[AMDGPU] Resolve pseudo registers at encoding uses

Pseudo-registers allow different register encodings
between gpu generations. Make sure we resolve the
pseudo regs to real regs whenever we get their
hardware encoding.
Using the correct encodings revealed a register
bank conflict and an unnecessary write dependency.
Tests have been updated to match.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D90721

Change-Id: I73c154cd24aecc820993b50bebaf4df97a5710ca
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
llvm/test/CodeGen/AMDGPU/flat-scratch.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll