perf: RISC-V: Define helper functions expose hpm counter width and count
authorAtish Patra <atishp@rivosinc.com>
Sun, 5 Feb 2023 01:15:02 +0000 (17:15 -0800)
committerAnup Patel <anup@brainfault.org>
Tue, 7 Feb 2023 15:05:31 +0000 (20:35 +0530)
commit585e351ff359c032ea7ab48d999b252ba09f8051
tree044d4851b92f96f89b686c3b2c597d4c3304dc80
parentcdeb59bbf19f456253fd257c744b8383f972cf1e
perf: RISC-V: Define helper functions expose hpm counter width and count

KVM module needs to know how many hardware counters and the counter
width that the platform supports. Otherwise, it will not be able to show
optimal value of virtual counters to the guest. The virtual hardware
counters also need to have the same width as the logical hardware
counters for simplicity. However, there shouldn't be mapping between
virtual hardware counters and logical hardware counters. As we don't
support hetergeneous harts or counters with different width as of now,
the implementation relies on the counter width of the first available
programmable counter.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
drivers/perf/riscv_pmu_sbi.c
include/linux/perf/riscv_pmu.h