drm/i915/guc: Implement no mid batch preemption for multi-lrc
authorMatthew Brost <matthew.brost@intel.com>
Thu, 14 Oct 2021 17:19:59 +0000 (10:19 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Fri, 15 Oct 2021 17:45:50 +0000 (10:45 -0700)
commit5851387a422c2949cb19b52efd9616ff8b18bddd
tree25b1a36d348cd71f9faf426ce4cf8971d5428024
parentf9d72092cb4902af8b5d4e647589deb248cfb44d
drm/i915/guc: Implement no mid batch preemption for multi-lrc

For some users of multi-lrc, e.g. split frame, it isn't safe to preempt
mid BB. To safely enable preemption at the BB boundary, a handshake
between parent and child is needed, syncing the set of BBs at the
beginning and end of each batch. This is implemented via custom
emit_bb_start & emit_fini_breadcrumb functions and enabled by default if
a context is configured by set parallel extension.

Lastly, this patch updates the process descriptor to the correct size as
the memory used in the handshake is directly after the process
descriptor.

v2:
 (John Harrison)
  - Fix a few comments wording
  - Add struture for parent page layout
v3:
 (John Harrison)
  - A structure for sync semaphore
  - Use offsetof to calc address
  - Update commit message
v4:
 (John Harrison)
  - Fix typos in comment explaining memory map of scratch page

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014172005.27155-20-matthew.brost@intel.com
drivers/gpu/drm/i915/gt/intel_context.c
drivers/gpu/drm/i915/gt/intel_context_types.h
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c