MAINTAINERS: generify the Microchip RISC-V entry name
authorConor Dooley <conor.dooley@microchip.com>
Wed, 9 Nov 2022 21:22:18 +0000 (21:22 +0000)
committerArnd Bergmann <arnd@arndb.de>
Tue, 15 Nov 2022 15:48:02 +0000 (16:48 +0100)
commit5836bf833a763e1573ce6fe5d0c310af23ebd49d
tree2a56c0c58dcf04428bdc99cfefdab262859b2e66
parentbe7d172b0f911e356a1cba5ea96f8e5a116bb7cb
MAINTAINERS: generify the Microchip RISC-V entry name

These drivers work on our other FPGAs, for example the non-SoC PolarFire
connected to an FU-540 via chiplink. Make the entry a wee bit more
generic to match. While at it, remove the / from the heading so that it
matches other, neighbouring RISC-V entries.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221109212219.1598355-3-conor@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
MAINTAINERS