[AArch64] Update v8.5a MTE LDG/STG instructions
authorJaved Absar <javed.absar@arm.com>
Wed, 3 Apr 2019 14:12:13 +0000 (14:12 +0000)
committerJaved Absar <javed.absar@arm.com>
Wed, 3 Apr 2019 14:12:13 +0000 (14:12 +0000)
commit5820db93c925eeb3b7f4fa47f6a3cfecaf1fa2aa
tree1ff3270c859a8c03933f01336c33ebe2b4387c3a
parentee737a84d75b701c2ae3a8c9a0abbae63fc330af
[AArch64] Update v8.5a MTE LDG/STG instructions

The latest MTE specification adds register Xt to the STG instruction family:
  STG [Xn, #offset] -> STG Xt, [Xn, #offset]
The tag written to memory is taken from Xt rather than Xn.
Also, the LDG instruction also was changed to read return address from Xt:
  LDG Xt, [Xn, #offset].
This patch includes those changes and tests.
Specification is at: https://developer.arm.com/docs/ddi0596/c
Differential Revision: https://reviews.llvm.org/D60188

llvm-svn: 357583
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/test/MC/AArch64/armv8.5a-mte-error.s
llvm/test/MC/AArch64/armv8.5a-mte.s
llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt