[mips] Enable tail calls by default
authorSimon Dardis <simon.dardis@imgtec.com>
Thu, 4 Aug 2016 09:17:07 +0000 (09:17 +0000)
committerSimon Dardis <simon.dardis@imgtec.com>
Thu, 4 Aug 2016 09:17:07 +0000 (09:17 +0000)
commit57f4ae4625fba08eef7451b14a01ae07d9b632af
tree4c52e0b556de23fd9b205721eb820b04fb553e92
parentb18751578421b6cc93f70a690d4902d28e18a1a4
[mips] Enable tail calls by default

Enable tail calls by default for (micro)MIPS(64).

microMIPS is slightly more tricky than doing it for MIPS(R6) or microMIPSR6.
microMIPS has two instruction encodings: 16bit and 32bit along with some
restrictions on the size of the instruction that can fill the delay slot.
For safe tail calls for microMIPS, the delay slot filler attempts to find
a correct size instruction for the delay slot of TAILCALL pseudos.

Reviewers: dsanders, vkalintris

Subscribers: jfb, dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D21138

llvm-svn: 277708
19 files changed:
llvm/lib/Target/Mips/MicroMipsInstrInfo.td
llvm/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/lib/Target/Mips/Mips64InstrInfo.td
llvm/lib/Target/Mips/Mips64r6InstrInfo.td
llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
llvm/lib/Target/Mips/MipsInstrInfo.cpp
llvm/lib/Target/Mips/MipsInstrInfo.td
llvm/lib/Target/Mips/MipsSEISelLowering.cpp
llvm/test/CodeGen/Mips/biggot.ll
llvm/test/CodeGen/Mips/brdelayslot.ll
llvm/test/CodeGen/Mips/cconv/reserved-space.ll
llvm/test/CodeGen/Mips/fastcc.ll
llvm/test/CodeGen/Mips/gpreg-lazy-binding.ll
llvm/test/CodeGen/Mips/i64arg.ll
llvm/test/CodeGen/Mips/indirectcall.ll
llvm/test/CodeGen/Mips/lazy-binding.ll
llvm/test/CodeGen/Mips/llvm-ir/call.ll
llvm/test/CodeGen/Mips/nacl-branch-delay.ll
llvm/test/CodeGen/Mips/tailcall.ll