[PowerPC] Do not add the relocation addend to the instruction encoding
authorStefan Pintilie <stefanp@ca.ibm.com>
Mon, 15 Jun 2020 14:40:02 +0000 (09:40 -0500)
committerStefan Pintilie <stefanp@ca.ibm.com>
Mon, 15 Jun 2020 14:51:34 +0000 (09:51 -0500)
commit57c9dc0521ab7ed7fbff0a25da16312e5a410e66
treee3dfa60c8d4edee3c2913758d70e51dc10b91152
parent979720a9bbcfff1e0d3f1e6e4e9ba67aeed71def
[PowerPC] Do not add the relocation addend to the instruction encoding

We should not be adding the relocation addend to the instruction encoding.
This patch removes that and sets those bits to zero.

Differential Revision: https://reviews.llvm.org/D81082
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll