[RISCV] Add "lla" pseudo-instruction to assembler
authorRoger Ferrer Ibanez <rofirrim@gmail.com>
Thu, 9 Aug 2018 07:08:20 +0000 (07:08 +0000)
committerRoger Ferrer Ibanez <rofirrim@gmail.com>
Thu, 9 Aug 2018 07:08:20 +0000 (07:08 +0000)
commit577a97e2b9177fb48a01bde79e2f9af260fa4653
treea7ba23f8d35e677587591c9782096250a5040e87
parent7164b7d3472611c04bc2d52b99d9ea7718fce62e
[RISCV] Add "lla" pseudo-instruction to assembler

This pseudo-instruction is similar to la but uses PC-relative addressing
unconditionally. This is, la is only different to lla when using -fPIC. This
pseudo-instruction seems often forgotten in several specs but it is definitely
mentioned in binutils opcodes/riscv-opc.c. The semantics are defined both in
page 37 of the "RISC-V Reader" book but also in function macro found in
gas/config/tc-riscv.c.

This is a very first step towards adding PIC support for Linux in the RISC-V
backend.

The lla pseudo-instruction expands to a sequence of auipc + addi with a couple
of pc-rel relocations where the second points to the first one. This is
described in
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#pc-relative-symbol-addresses

For now, this patch only introduces support of that pseudo instruction at the
assembler parser.

Differential Revision: https://reviews.llvm.org/D49661

llvm-svn: 339314
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/test/MC/RISCV/lla-invalid.s [new file with mode: 0644]
llvm/test/MC/RISCV/rvi-pseudos.s [new file with mode: 0644]