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(parent: 8640105) | patch
clk: renesas: r9a07g044: Add MTU3a clock and reset entry
authorBiju Das <biju.das.jz@bp.renesas.com>
Wed, 5 Oct 2022 11:18:55 +0000 (12:18 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 17 Oct 2022 08:23:52 +0000 (10:23 +0200)
commit576d6b40dcceade7d77e88f63e621349c6937bc3
tree4bf09548b4560b8d08ff4476ddc383d3cfc04985tree | snapshot
parent864010561d8ce63506cb34063bb5db6e96bfefc3commit | diff
clk: renesas: r9a07g044: Add MTU3a clock and reset entry

Add MTU3a clock and reset entry to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221005111855.553436-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c diff | blob | history
Domain: System / Kernel;