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(parent: f757152) | patch
AVX512FP16: Fix ICE for 2 v4hf vector concat
authorHongyu Wang <hongyu.wang@intel.com>
Fri, 15 Oct 2021 02:58:16 +0000 (10:58 +0800)
committerHongyu Wang <hongyu.wang@intel.com>
Fri, 15 Oct 2021 04:56:57 +0000 (12:56 +0800)
commit575191b976a5175be6579590b05f1f1d3550cefc
tree3759213c77ea06a22fbd05196d17e89e96e5efe7tree | snapshot
parentf7571527a44808cd7062c77bb9570c13f4f6a126commit | diff
AVX512FP16: Fix ICE for 2 v4hf vector concat

For V4HFmode, doing vector concat like

__builtin_shufflevector (a, b, {0, 1, 2, 3, 4, 5, 6, 7})

could trigger ICE since it is not handled in ix86_vector_init ().

Handle HFmode like HImode to avoid such ICE.

gcc/ChangeLog:

* config/i386/i386-expand.c (ix86_expand_vector_init):
For half_vector concat for HFmode, handle them like HImode.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx512fp16-v4hf-concat.c: New test.
gcc/config/i386/i386-expand.c diff | blob | history
gcc/testsuite/gcc.target/i386/avx512fp16-v4hf-concat.c [new file with mode: 0644] blob
Domain: System / Toolchain;