clk: st: flexgen: embed soc clock outputs within compatible data
authorAlain Volmat <avolmat@me.com>
Wed, 31 Mar 2021 20:16:27 +0000 (22:16 +0200)
committerStephen Boyd <sboyd@kernel.org>
Mon, 28 Jun 2021 02:53:39 +0000 (19:53 -0700)
commit574dffc2995cc96f1c13e802576d1fb146ebd387
treedf89389cd277f94cb01f21df7305de47001f4cf0
parentb5a87e692c044c42bf9309cde4bc455bec246c60
clk: st: flexgen: embed soc clock outputs within compatible data

In order to avoid relying on the old style description via the DT
clock-output-names, add compatible data describing the flexgen
outputs clocks for all STiH407/STiH410 and STiH418 SOCs.

In order to ease transition between the two methods, this commit
introduce the new compatible without removing the old method.
Once DTs will be fixed, the method relying on DT clock-output-names
will be removed from this driver as well as old compatibles.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20210331201632.24530-3-avolmat@me.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/st/clk-flexgen.c