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(parent: bb322e7) | patch
[X86] Enable 8-bit OR with disjoint bits to convert to LEA
authorCraig Topper <craig.topper@intel.com>
Tue, 5 Mar 2019 18:37:33 +0000 (18:37 +0000)
committerCraig Topper <craig.topper@intel.com>
Tue, 5 Mar 2019 18:37:33 +0000 (18:37 +0000)
commit572e94ca023a292dde836b070763f010273444f9
treeb9eac8768bb2d2a9253f2a70916faaaaa60db6b4tree | snapshot
parentbb322e79c16c5a372a1f257327e29feddcb2bc04commit | diff
[X86] Enable 8-bit OR with disjoint bits to convert to LEA

We already support 8-bits adds in convertToThreeAddress. But we can also support 8-bit OR if the bits are disjoint. We already do this for 16/32/64.

Differential Revision: https://reviews.llvm.org/D58863

llvm-svn: 355423
16 files changed:
llvm/lib/Target/X86/X86InstrCompiler.td diff | blob | history
llvm/lib/Target/X86/X86InstrFoldTables.cpp diff | blob | history
llvm/lib/Target/X86/X86InstrInfo.cpp diff | blob | history
llvm/lib/Target/X86/X86InstrInfo.h diff | blob | history
llvm/lib/Target/X86/X86MCInstLower.cpp diff | blob | history
llvm/lib/Target/X86/X86MacroFusion.cpp diff | blob | history
llvm/test/CodeGen/X86/bitreverse.ll diff | blob | history
llvm/test/CodeGen/X86/bool-math.ll diff | blob | history
llvm/test/CodeGen/X86/fshl.ll diff | blob | history
llvm/test/CodeGen/X86/select.ll diff | blob | history
llvm/test/CodeGen/X86/select_const.ll diff | blob | history
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-innerouter.ll diff | blob | history
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-interleavedbits.ll diff | blob | history
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll diff | blob | history
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-lowhigh.ll diff | blob | history
llvm/test/CodeGen/X86/vector-bitreverse.ll diff | blob | history
Domain: System / Toolchain;