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ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema
authorKrzysztof Kozlowski <krzk@kernel.org>
Fri, 26 Jun 2020 08:06:37 +0000 (10:06 +0200)
committerWei Xu <xuwei5@hisilicon.com>
Fri, 17 Jul 2020 02:09:21 +0000 (10:09 +0800)
commit5720fcdc2e5af74e51c5e3102fcefd9fb061a666
treee731fbe3a9586929acaf748fc86f9e7719857584tree | snapshot
parentb3a9e3b9622ae10064826dccb4f7a52bd88c7407commit | diff
ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema

Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm/boot/dts/hi3620.dtsi diff | blob | history
arch/arm/boot/dts/hisi-x5hd2.dtsi diff | blob | history
Domain: System / Kernel;