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(parent: 783ba64) | patch
[SelectionDAG] Move ISD:PARITY formation from DAGCombine to SimplifyDemandedBits.
authorCraig Topper <craig.topper@intel.com>
Mon, 14 Sep 2020 02:51:20 +0000 (19:51 -0700)
committerCraig Topper <craig.topper@intel.com>
Mon, 14 Sep 2020 04:04:13 +0000 (21:04 -0700)
commit56b33391d3a42ef8e6fd1bcdcbcbb72bfb562092
tree2ca6d122ec066ecf94dfe7861eb1b66c52c4a303tree | snapshot
parent783ba64a8950768d412555abd52bbc65156d4fb5commit | diff
[SelectionDAG] Move ISD:PARITY formation from DAGCombine to SimplifyDemandedBits.

Previously, we formed ISD::PARITY by looking for (and (ctpop X), 1)
but the AND might be separated from the ctpop. For example if the
parity result is multiplied by 2, we'll pull the AND through the
shift.

So to handle more cases, move to SimplifyDemandedBits where we
can handle more cases that result in only the LSB of the CTPOP
being used.
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff | blob | history
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff | blob | history
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp diff | blob | history
llvm/test/CodeGen/X86/parity.ll diff | blob | history
Domain: System / Toolchain;