drm/i915/guc: Limit scheduling properties to avoid overflow
authorJohn Harrison <John.C.Harrison@Intel.com>
Thu, 6 Oct 2022 21:38:10 +0000 (14:38 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Mon, 24 Oct 2022 19:11:59 +0000 (12:11 -0700)
commit568944af44e7538ed5d1389dabf56e938afdaf4f
tree706030b5340e45db1b9d264a45e99fed96383f2c
parentc61aa7407d0d1ebf66d59fd54971964e22a6f2da
drm/i915/guc: Limit scheduling properties to avoid overflow

GuC converts the pre-emption timeout and timeslice quantum values into
clock ticks internally. That significantly reduces the point of 32bit
overflow. On current platforms, worst case scenario is approximately
110 seconds. Rather than allowing the user to set higher values and
then get confused by early timeouts, add limits when setting these
values.

v2: Add helper functions for clamping (review feedback from Tvrtko).
v3: Add a bunch of BUG_ON range checks in addition to the checks
already in the clamping functions (Tvrtko)

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221006213813.1563435-2-John.C.Harrison@Intel.com
drivers/gpu/drm/i915/gt/intel_engine.h
drivers/gpu/drm/i915/gt/intel_engine_cs.c
drivers/gpu/drm/i915/gt/sysfs_engines.c
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c