drm/i915/rps: Centralize computation of freq caps
authorAshutosh Dixit <ashutosh.dixit@intel.com>
Wed, 6 Apr 2022 19:18:48 +0000 (12:18 -0700)
committerAnshuman Gupta <anshuman.gupta@intel.com>
Thu, 7 Apr 2022 13:25:08 +0000 (18:55 +0530)
commit56758cc4595509b6f6d0be56d08003bd87b75635
tree755cf043d7f564296d746afd7a5462ad1bfb84f5
parentae686e220b5f3962f9188e6661bc370941845a3f
drm/i915/rps: Centralize computation of freq caps

Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do identical computation for these caps in multiple
places, here we centralize the computation of these caps. This makes the
code cleaner and also more extensible for the future.

v2: Clarify that caps are in "hw units" in comments (Lucas De Marchi)
v3: Minor checkpatch fix
v4: s/intel_rps_get_freq_caps/gen6_rps_get_freq_caps/ (Badal Nilawar)
v5: Changes comments to kernel doc (Anshuman Gupta)

Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
Acked-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220406191848.20895-1-ashutosh.dixit@intel.com
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
drivers/gpu/drm/i915/gt/intel_rps.c
drivers/gpu/drm/i915/gt/intel_rps.h
drivers/gpu/drm/i915/gt/intel_rps_types.h
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c