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(parent: fef2998) | patch
dt-bindings: net: altera: tse: add an optional pcs register range
authorMaxime Chevallier <maxime.chevallier@bootlin.com>
Fri, 2 Sep 2022 08:32:05 +0000 (10:32 +0200)
committerDavid S. Miller <davem@davemloft.net>
Mon, 5 Sep 2022 09:16:53 +0000 (10:16 +0100)
commit565f02fc1e5dc18a577545aaef3c1191cd011849
tree566380cce9c6fe7c68afcab001fe77482e028f7atree | snapshot
parentfef2998203e17e4298843afb2056fbed44611734commit | diff
dt-bindings: net: altera: tse: add an optional pcs register range

Some implementations of the TSE have their PCS as an external bloc,
exposed at its own register range. Document this, and add a new example
showing a case using the pcs and the new phylink conversion to connect
an sfp port to a TSE mac.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Documentation/devicetree/bindings/net/altr,tse.yaml diff | blob | history
Domain: System / Kernel;