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anv: Port over CACHE_MODE_1 optimization fix enables from brw.
authorKenneth Graunke <kenneth@whitecape.org>
Wed, 24 May 2017 04:33:12 +0000 (21:33 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 30 May 2017 21:59:31 +0000 (14:59 -0700)
commit56535959fd5acf1066506d6387adb16d86d4c65c
tree459b40677644a6946d73223fb8623452e4974bd0tree | snapshot
parent53368b008e62ddfbda896b5f0d3c69415052a845commit | diff
anv: Port over CACHE_MODE_1 optimization fix enables from brw.

Ben and I haven't observed these to help anything, but they enable
hardware optimizations for particular cases.  It's probably best to
enable them ahead of time, before we run into such a case.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/vulkan/genX_state.c diff | blob | history
Domain: Graphics System / GL;