The maximal representable alignment in LLVM IR is 1GiB, not 512MiB
authorRoman Lebedev <lebedev.ri@gmail.com>
Thu, 26 Aug 2021 08:51:28 +0000 (11:51 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Thu, 26 Aug 2021 09:53:39 +0000 (12:53 +0300)
commit564d85e090afdaac6475d43708d77a7fa0cf5301
treeef034c0943b3ae8021784f2c3e894aedbce2aa04
parent5ece5562719dde1d8e88fdb41ec5ac0cf6f05274
The maximal representable alignment in LLVM IR is 1GiB, not 512MiB

In LLVM IR, `AlignmentBitfieldElementT` is 5-bit wide
But that means that the maximal alignment exponent is `(1<<5)-2`,
which is `30`, not `29`. And indeed, alignment of `1073741824`
roundtrips IR serialization-deserialization.

While this doesn't seem all that important, this doubles
the maximal supported alignment from 512MiB to 1GiB,
and there's actually one noticeable use-case for that;
On X86, the huge pages can have sizes of 2MiB and 1GiB (!).

So while this doesn't add support for truly huge alignments,
which i think we can easily-ish do if wanted, i think this adds
zero-cost support for a not-trivially-dismissable case.

I don't believe we need any upgrade infrastructure,
and since we don't explicitly record the IR version,
we don't need to bump one either.

As @craig.topper speculates in D108661#2963519,
this might be an artificial limit imposed by the original implementation
of the `getAlignment()` functions.

Differential Revision: https://reviews.llvm.org/D108661
42 files changed:
clang/include/clang/Sema/Sema.h
clang/test/CXX/drs/dr6xx.cpp
clang/test/CodeGen/builtin-assume-aligned.c
clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp
clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp
clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp
clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp
clang/test/CodeGen/catch-alignment-assumption-openmp.cpp
clang/test/Sema/alloc-align-attr.c
clang/test/Sema/attr-aligned.c
clang/test/Sema/builtin-assume-aligned.c
clang/test/SemaCXX/alloc-align-attr.cpp
llvm/include/llvm/IR/Instruction.h
llvm/include/llvm/IR/Value.h
llvm/test/Assembler/align-inst-alloca.ll
llvm/test/Assembler/align-inst-load.ll
llvm/test/Assembler/align-inst-store.ll
llvm/test/Assembler/align-inst.ll
llvm/test/Bitcode/inalloca.ll
llvm/test/CodeGen/MIR/X86/load-with-1gb-alignment.mir [new file with mode: 0644]
llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead_2.ll
llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
llvm/test/Transforms/Attributor/IPConstantProp/pthreads.ll
llvm/test/Transforms/Attributor/callbacks.ll
llvm/test/Transforms/Attributor/liveness.ll
llvm/test/Transforms/Attributor/memory_locations.ll
llvm/test/Transforms/Attributor/noalias.ll
llvm/test/Transforms/Attributor/nocapture-1.ll
llvm/test/Transforms/Attributor/noundef.ll
llvm/test/Transforms/Attributor/undefined_behavior.ll
llvm/test/Transforms/Attributor/value-simplify.ll
llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
llvm/test/Transforms/InstCombine/atomic.ll
llvm/test/Transforms/InstCombine/getelementptr.ll
llvm/test/Transforms/InstCombine/load.ll
llvm/test/Transforms/InstCombine/mempcpy.ll
llvm/test/Transforms/InstCombine/pr44245.ll
llvm/test/Transforms/InstCombine/store.ll
llvm/test/Transforms/OpenMP/parallel_level_fold.ll
llvm/test/Verifier/align-md.ll
llvm/unittests/IR/ValueTest.cpp