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(parent: 4dce7c2) | patch
[PowerPC] add has side effect for SAT bit clobber intrinsics/instructions
authorChen Zheng <czhengsz@cn.ibm.com>
Thu, 5 Nov 2020 14:32:25 +0000 (09:32 -0500)
committerChen Zheng <czhengsz@cn.ibm.com>
Mon, 21 Dec 2020 00:48:26 +0000 (19:48 -0500)
commit564066524ad0872eb8b7cadfaf7c94274f3d5951
tree5f37309974f0536173d855c61c429e6cb80dfd24tree | snapshot
parent4dce7c2e2092953f2cea1a2c1ffd4a53ec2531accommit | diff
[PowerPC] add has side effect for SAT bit clobber intrinsics/instructions

This patch does two things:
1: fix the typo that intrinsic mfvscr should be with no readmem property
2: since VSCR is not modeled yet, add has side effect for SAT bit clobber
   intrinsics/instructions.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D90807
llvm/include/llvm/IR/IntrinsicsPowerPC.td diff | blob | history
llvm/lib/Target/PowerPC/PPCInstrAltivec.td diff | blob | history
llvm/test/CodeGen/PowerPC/sat-register-clobber.ll [new file with mode: 0644] blob
Domain: System / Toolchain;