drm/i915: Disable tesselation clock gating on tgl A0
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Fri, 7 Feb 2020 15:51:37 +0000 (17:51 +0200)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 7 Feb 2020 20:51:19 +0000 (20:51 +0000)
commit561db8296d8b88ac21e76f99ba95f8de2c830359
tree9e061e0d1f2a2c17a9f13825dc8ceb0ba37c8ceb
parentfb5970da1b428b6c0f89441b7d3015328da92cb6
drm/i915: Disable tesselation clock gating on tgl A0

Disable TEDOP clock gating flow by programming 0x20A0[19] = 1

References: HSDES#1407928979
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200207155138.30978-1-mika.kuoppala@linux.intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c
drivers/gpu/drm/i915/i915_reg.h