crypto: qat - set COMPRESSION capability for DH895XCC
authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Thu, 7 Apr 2022 16:54:41 +0000 (17:54 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 9 Jun 2022 08:23:05 +0000 (10:23 +0200)
commit55e1c42d968f1dc14e32cbc535d65d9a73602b7d
tree068f95d05b6130c03ca6ede680f2894440560b27
parent7829a859582500acd0ab88167cfbf19b8433ee83
crypto: qat - set COMPRESSION capability for DH895XCC

[ Upstream commit 0eaa51543273fd0f4ba9bea83638f7033436e5eb ]

The capability detection logic clears bits for the features that are
disabled in a certain SKU. For example, if the bit associate to
compression is not present in the LEGFUSE register, the correspondent
bit is cleared in the capability mask.
This change adds the compression capability to the mask as this was
missing in the commit that enhanced the capability detection logic.

Fixes: cfe4894eccdc ("crypto: qat - set COMPRESSION capability for QAT GEN2")
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Marco Chiappero <marco.chiappero@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c