clk: hisilicon: fix lock assignment
authorLeo Yan <leo.yan@linaro.org>
Sat, 21 Jan 2017 02:26:31 +0000 (10:26 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 27 Jan 2017 00:18:34 +0000 (16:18 -0800)
commit55da97e38cab844682abb71400a908b871d0054c
tree2803c0d3fa402c7d577d294761a2ba4cd1815511
parentde9b5a24047d50490ff58428bd1dc8bc4b63a225
clk: hisilicon: fix lock assignment

In clock driver initialize phase the spinlock is missed to assignment
to struct clkgate_separated, finally there have no locking to protect
exclusive accessing for clock registers.

This bug introduces the console has no output after enable coresight
driver on 96boards Hikey; this is because console using UART3, which
has shared the same register with coresight clock enabling bit. After
applied this patch it can assign lock properly to protect exclusive
accessing, and console can work well after enabled coresight modules.

Fixes: 0aa0c95f743a ("clk: hisilicon: add common clock support")
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/hisilicon/clkgate-separated.c