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(parent: 86e6523) | patch
[PhaseOrdering] add tests for vector cmp reductions; NFC
authorSanjay Patel <spatel@rotateright.com>
Fri, 9 Jul 2021 19:08:03 +0000 (15:08 -0400)
committerSanjay Patel <spatel@rotateright.com>
Fri, 9 Jul 2021 19:32:12 +0000 (15:32 -0400)
commit55c5c0485924895800c683386a4560bdc253623e
tree05537bed4145c3e984aaea62c8569121b5ec3e80tree | snapshot
parent86e65234404fa329cd65b5522aae8e82f4fa152bcommit | diff
[PhaseOrdering] add tests for vector cmp reductions; NFC

These are based on PR41312. There needs to be effort
from all of SimplifyCFG, InstCombine, SLP, and possibly
VectorCombine to get this into ideal form.
llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll [new file with mode: 0644] blob
Domain: System / Toolchain;