projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 359a792) | patch
Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares."
authorFlorian Hahn <flo@fhahn.com>
Mon, 21 Feb 2022 10:52:09 +0000 (10:52 +0000)
committerFlorian Hahn <flo@fhahn.com>
Mon, 21 Feb 2022 10:52:10 +0000 (10:52 +0000)
commit55c181a6c786cfbfa8b7aabe0a8ba721a65b1445
tree4fbb05787254fdc498b2b8c268ae731a93a7e7c4tree | snapshot
parent359a792f9b13f6eefeb5fb2a1af2dcbb1cded6e8commit | diff
Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares."

This reverts commit 2a46450849de6904fc64f9a65303b20ca7fc9dbd.

This triggers the following assertion in an internal project:

    Assertion failed: (VRegInfo[Reg.id()].first.is<const TargetRegisterClass
    *>() && "Register class not set, wrong accessor"), function getRegClass,
    file MachineRegisterInfo.h, line 646.

I'll work with the author directly to get a reproducer.
llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h diff | blob | history
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp diff | blob | history
llvm/test/CodeGen/AArch64/arm64-ccmp.ll diff | blob | history
Domain: System / Toolchain;