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(parent: a502aa7) | patch
ac/nir: implement nir_op_vec5
authorRhys Perry <pendingchaos02@gmail.com>
Thu, 7 Jan 2021 13:29:35 +0000 (13:29 +0000)
committerMarge Bot <eric+marge@anholt.net>
Fri, 8 Jan 2021 14:27:07 +0000 (14:27 +0000)
commit55aeac7af46f5a4d9b40f2fa7fb2d6ca285f9202
treed6aadeb5f965b04e8f7c614e1f6bdd1e50414fa6tree | snapshot
parenta502aa7b043c1c7e1c33dc28f7ac4b066802571acommit | diff
ac/nir: implement nir_op_vec5

Since sparse fetch/load uses vec5 destinations, it may be possible that we
encounter nir_op_vec5.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
src/amd/llvm/ac_nir_to_llvm.c diff | blob | history
Domain: Graphics System / GL;