drm/i915/cnl: DDI - PLL mapping
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 9 Jun 2017 22:26:02 +0000 (15:26 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Mon, 12 Jun 2017 16:41:42 +0000 (09:41 -0700)
commit555e38d2731720a8eacc0463a26bdd74315d2d63
tree3f502a536b97c6f561525a884f808003a57c1534
parentd1999e9ef84f2c2d012d8acec2b68d937bcfd6c4
drm/i915/cnl: DDI - PLL mapping

One of the steps for PLL (un)initialization is to (un)map
the correspondent DDI that is actually using that PLL.

So, let's do this step following the places already stablished
and used so far, although spec put this as part of PLL
initialization sequences.

v2: Use proper prefix on bits names as suggested by Ander.
v3: Add missed "~". Without that the logic was inverted
    so we were disabling interrupts.
    Credits-to: Clinton
    Credits-to: Art
v4: Spec is getting updated to do DDI -> PLL mapping
    and clock on in 2 separated reg writes. (Paulo)
    Also update bits definitions to use space
    (1 << 1) instead of (1<<1). (Paulo)

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Art Runyan <arthur.j.runyan@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Kahola, Mika <mika.kahola@intel.com>
Cc: Ander Conselvan De Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Kahola, Mika <mika.kahola@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1497047175-27250-5-git-send-email-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_ddi.c