projects / contrib / beignet.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: c4d1f40) | patch
GBE: fix insntruction scheduling related bugs in read64/write64.
authorZhigang Gong <zhigang.gong@gmail.com>
Thu, 8 Aug 2013 07:15:43 +0000 (15:15 +0800)
committerZhigang Gong <zhigang.gong@linux.intel.com>
Fri, 9 Aug 2013 15:29:07 +0000 (23:29 +0800)
commit552eae5f4c5d063038244ac3d11e2a0fc427e849
tree781bb195453df70cd9f63ca2a3e9faa7cd8b9cb9tree | snapshot
parentc4d1f4029965af26e7f1a0d3d22df1a8ecd4dd2ecommit | diff
GBE: fix insntruction scheduling related bugs in read64/write64.

In read64 and write64, we allocate some temporary registers and
we should put all of those temporary registers may be modified
to the instruction's dst array. Otherwise, the latter post instruction
scheduling may rearrange the instruction incorrectly.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: "Song, Ruiling" <ruiling.song@intel.com>
backend/src/backend/gen_context.cpp diff | blob | history
backend/src/backend/gen_encoder.cpp diff | blob | history
backend/src/backend/gen_insn_selection.cpp diff | blob | history
Domain: SCM / Uncategorized;