[AVR] Do not use R0/R1 on avrtiny
authorAyke van Laethem <aykevanlaethem@gmail.com>
Wed, 23 Nov 2022 16:24:44 +0000 (17:24 +0100)
committerAyke van Laethem <aykevanlaethem@gmail.com>
Mon, 28 Nov 2022 17:05:55 +0000 (18:05 +0100)
commit5527b215160cf202431881df3be59ed5c8dabb25
tree90b10abf8045241c1448342840d37e17e56a2894
parentdb07d79ab06f8f88a8bc161654336e235d906ad7
[AVR] Do not use R0/R1 on avrtiny

This patch makes sure the compiler uses R16/R17 on avrtiny (attiny10
etc) instead of R0/R1.

Some notes:

  * For the NEGW and ROLB instructions, it adds an explicit zero
    register. This is necessary because the zero register is different
    on avrtiny (and InstrInfo Uses lines need a fixed register).
  * Not entirely sure about putting all tests in features/avr-tiny.ll,
    but it doesn't seem like the "target-cpu"="attiny10" attribute
    works.

Updates: https://github.com/llvm/llvm-project/issues/53459

Differential Revision: https://reviews.llvm.org/D138582
llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
llvm/lib/Target/AVR/AVRFrameLowering.cpp
llvm/lib/Target/AVR/AVRISelLowering.cpp
llvm/lib/Target/AVR/AVRISelLowering.h
llvm/lib/Target/AVR/AVRInstrInfo.td
llvm/lib/Target/AVR/AVRRegisterInfo.cpp
llvm/lib/Target/AVR/AVRSubtarget.h
llvm/test/CodeGen/AVR/features/avr-tiny.ll
llvm/test/CodeGen/AVR/pseudo/NEGWRd.mir
llvm/test/CodeGen/AVR/pseudo/ROLBrd.mir
llvm/test/CodeGen/AVR/return.ll