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(parent: be67c41) | patch
dt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions
authorBiju Das <biju.das@bp.renesas.com>
Thu, 5 Sep 2019 06:52:40 +0000 (07:52 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 1 Oct 2019 07:49:40 +0000 (09:49 +0200)
commit54ce17dd40fd846a7ac1e87e1103032933d2bd21
treea377e3a27addb28a179097c950c2ff047fc7841atree | snapshot
parentbe67c41781cb4c06a4acb0b92db0cbb728e955e2commit | diff
dt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions

Add all RZ/G2N Clock Pulse Generator Core Clock Outputs, as listed in
Table 8.2d ("List of Clocks [RZ/G2N]") of the RZ/G2N Hardware User's
Manual.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1567666360-28035-1-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/clock/r8a774b1-cpg-mssr.h [new file with mode: 0644] blob
Domain: System / Kernel;