sunxi: video: Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1
authorHans de Goede <hdegoede@redhat.com>
Sun, 21 Dec 2014 15:27:45 +0000 (16:27 +0100)
committerHans de Goede <hdegoede@redhat.com>
Wed, 14 Jan 2015 13:56:39 +0000 (14:56 +0100)
commit5489ebc7af2e0f46eb5e818e2dc646d03bd96541
treea7bed75b3f8ad3b7e9e2db4834f55d7bff9f80fd
parent0e045215578bc67fab00009ba4985bbdcd90de23
sunxi: video: Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1

Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1, this is a
preparation patch for adding lcd support.

While at it also swap the divider search order, searching from low to
high, as the comment above the code says we should do. In cases where there
are multiple solutions this will result in picking a lower pll clock and
divider, which is more stable and saves power.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
arch/arm/include/asm/arch-sunxi/clock_sun6i.h
drivers/video/sunxi_display.c