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[X86][X87] Add test case for PR34080
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 6 Aug 2017 11:22:33 +0000 (11:22 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 6 Aug 2017 11:22:33 +0000 (11:22 +0000)
commit5489781cc7bdc681e618df3f279c49b457f56131
tree221d69b4683c231edff98b68c0be95ad632050e8tree | snapshot
parentaabfbfa5fc7aec1bfe34a142372716dbfe5dced7commit | diff
[X86][X87] Add test case for PR34080

Test with/without the sandybridge (default) model for SSE2, SSE3 and AVX targets.

pre-SSE3 the issue is the order of the fpsw and fpcw load/stores (with SSE3 trunc-store FIST instructions avoid the sw/cw manipulations).

llvm-svn: 310198
llvm/test/CodeGen/X86/pr34080.ll [new file with mode: 0644] blob
Domain: System / Toolchain;