i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.
authorKenneth Graunke <kenneth@whitecape.org>
Sat, 7 Nov 2015 09:37:33 +0000 (01:37 -0800)
committerKenneth Graunke <kenneth@whitecape.org>
Sat, 14 Nov 2015 00:11:02 +0000 (16:11 -0800)
commit5480bbd90ea288877b6e56d4860feb8f97bcba80
tree4cc3bc6fe12e087a561d164af6e582447756245b
parent511de1a80cedc0add386dad79cce56dd68d2f611
i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.

We need to use per-slot offsets when there's non-uniform indexing,
as each SIMD channel could have a different index.  We want to use
them for any non-constant index (even if uniform), as it lives in
the message header instead of the descriptor, allowing us to set
offsets in GRFs rather than immediates.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
src/mesa/drivers/dri/i965/brw_defines.h
src/mesa/drivers/dri/i965/brw_fs.cpp
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
src/mesa/drivers/dri/i965/brw_shader.cpp