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author	Jojo R <rjiejie@linux.alibaba.com>
	Wed, 9 Nov 2022 08:17:20 +0000 (16:17 +0800)
committer	Jojo R <rjiejie@linux.alibaba.com>
	Mon, 26 Dec 2022 11:05:22 +0000 (19:05 +0800)
commit	54752f3ff6d50944f17c260a6dc47a4758a026fc
tree	6901e4e2aba5ae9010a7c4e2d67d416d7e2e125e	tree \| snapshot
parent	f34847e112acfa6370f613034e0459af06f522bb	commit \| diff

[RISCV] Implement assembler support for XTHeadVdot

This patch implements the T-Head vendor extensions (XTHeadVdot),
which is documented here, it's based on standard vector extension v1.0:
https://github.com/T-head-Semi/thead-extension-spec

clang/test/Preprocessor/riscv-target-features.c		diff \| blob \| history
llvm/docs/RISCVUsage.rst		diff \| blob \| history
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp		diff \| blob \| history
llvm/lib/Target/RISCV/RISCV.td		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVInstrInfo.td		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td	[new file with mode: 0644]	blob
llvm/lib/TargetParser/RISCVISAInfo.cpp		diff \| blob \| history
llvm/test/CodeGen/RISCV/attributes.ll		diff \| blob \| history
llvm/test/MC/RISCV/XTHeadVdot-valid.s	[new file with mode: 0644]	blob

Domain: System / Toolchain;

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