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RISC-V: KVM: Expose IMSIC registers as attributes of AIA irqchip
authorAnup Patel <apatel@ventanamicro.com>
Thu, 15 Jun 2023 07:33:53 +0000 (13:03 +0530)
committerAnup Patel <anup@brainfault.org>
Mon, 19 Jun 2023 16:57:58 +0000 (22:27 +0530)
commit5463091a51cfaab8922ac94e5178a05dfa836dbb
tree0cf99585879526a45fbd266ce9929d0f25422fbbtree | snapshot
parentdb8b7e97d6137a28b2bfc07e591d54da268f0c36commit | diff
RISC-V: KVM: Expose IMSIC registers as attributes of AIA irqchip

We expose IMSIC registers as KVM device attributes of the in-kernel
AIA irqchip device. This will allow KVM user-space to save/restore
IMISC state of each VCPU using KVM device ioctls().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/kvm_aia.h diff | blob | history
arch/riscv/include/uapi/asm/kvm.h diff | blob | history
arch/riscv/kvm/aia_device.c diff | blob | history
arch/riscv/kvm/aia_imsic.c diff | blob | history
Domain: System / Kernel;