[AArch64][SVE] Add intrinsics and patterns for logical predicate instructions
authorDanilo Carvalho Grael <danilo.carvalho.grael@huawei.com>
Thu, 5 Dec 2019 02:45:59 +0000 (21:45 -0500)
committeramehsan <e00408328@ptlaby04.huawei.com>
Thu, 5 Dec 2019 04:11:46 +0000 (23:11 -0500)
commit53b95a3cb6a7598bedbb21b2ecf742dafbd229e7
tree6a1c6d5f4070f6dbf44e2eed9220e0c361a164a9
parent9a3f892d018238dce5181e458905311db8e682f5
[AArch64][SVE] Add intrinsics and patterns for logical predicate instructions

Add instrinics and patters for the following logical predicate instructions:
-- and, ands, bic, bics, eor, eors
-- sel
-- orr, orrs, orn, orns, nor, nors, nand, nads
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve-int-log-pred.ll
llvm/test/CodeGen/AArch64/sve-int-log.ll
llvm/test/CodeGen/AArch64/sve-pred-log.ll [new file with mode: 0644]