drm: mxsfb: fix pixel clock polarity
authorStefan Agner <stefan@agner.ch>
Wed, 14 Dec 2016 20:48:09 +0000 (12:48 -0800)
committerDave Airlie <airlied@redhat.com>
Fri, 10 Mar 2017 01:10:49 +0000 (11:10 +1000)
commit53990e416bb7adaa59d045f325a47f31a11b75ee
treed87ea97b09ecedad96ffaf192c35dc1ee616517f
parent10f2889ba35aeb251b9945ec4c461af8c124c41f
drm: mxsfb: fix pixel clock polarity

The DRM subsystem specifies the pixel clock polarity from a
controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means
the controller drives the data on pixel clocks falling edge.
That is the controllers DOTCLK_POL=0 (Default is data launched
at negative edge).

Also change the data enable logic to be high active by default
and only change if explicitly requested via bus_flags. With
that defaults are:
- Data enable: high active
- Pixel clock polarity: controller drives data on negative edge

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/mxsfb/mxsfb_crtc.c