clk: sparx5: Add Sparx5 SoC DPLL clock driver
authorLars Povlsen <lars.povlsen@microchip.com>
Mon, 27 Jul 2020 08:42:09 +0000 (10:42 +0200)
committerStephen Boyd <sboyd@kernel.org>
Wed, 29 Jul 2020 01:17:56 +0000 (18:17 -0700)
commit53727eb6b3c210e826bb4c9d0aa89f65a5ae9342
tree74cbc9bfb001567eff987ee6da2cacacbf59170c
parent4299f85a67480cdb43a3c4c1840a05259727e83c
clk: sparx5: Add Sparx5 SoC DPLL clock driver

This adds a device driver for the Sparx5 SoC DPLL clock

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20200727084211.6632-9-lars.povlsen@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/Makefile
drivers/clk/clk-sparx5.c [new file with mode: 0644]