[MachinePipeliner] Fix Phi generation failure for large stages
authorYuta Mukai <mukai.yuta@fujitsu.com>
Tue, 9 Aug 2022 04:11:24 +0000 (13:11 +0900)
committerKAWASHIMA Takahiro <t-kawashima@fujitsu.com>
Tue, 9 Aug 2022 04:14:26 +0000 (13:14 +0900)
commit5357dd2f43a5aab28f34b69e7d3742dd50cbad98
treea7c069e54758e890c5dfe0d333f2df6e317ca4a0
parent0972a390b9c74cd994ad0250cf392aecb67502a3
[MachinePipeliner] Fix Phi generation failure for large stages

The previous code overwrites VRMap for prologue stages during Phi
generation if a register spans many stages.
As a result, the wrong register is used as the one coming from
the prologue in Phis at later stages. (A process exists to correct
this, but it does not work in all cases.)
In addition, VRMap for prologue must be preserved until addBranches().

This patch fixes them by separating the map for Phis into a different
variable (VRMapPhi).

Reviewed By: bcahoon

Differential Revision: https://reviews.llvm.org/D127840
llvm/include/llvm/CodeGen/ModuloSchedule.h
llvm/lib/CodeGen/ModuloSchedule.cpp
llvm/test/CodeGen/PowerPC/sms-large-stages.mir [new file with mode: 0644]