drm/nva3/clk: better pll calculation when no fractional fb div available
authorBen Skeggs <bskeggs@redhat.com>
Wed, 27 Apr 2011 16:34:21 +0000 (02:34 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Mon, 16 May 2011 00:50:59 +0000 (10:50 +1000)
commit52eba8dd5e830a836425e92d002bc51e42d3280e
tree88faa691a4828e7a3ca874e4d8d45a2a6feff23f
parent96d1fcf8b5a3a9c66fddeaa9fb71e4e68ee2e08b
drm/nva3/clk: better pll calculation when no fractional fb div available

The core/mem/shader clocks don't support the fractional feedback divider,
causing our calculated clocks to be off by quite a lot in some cases.  To
solve this we will switch to a search-based algorithm when fN is NULL.

For my NVA8 at PL3, this actually generates identical cooefficients to
the binary driver.  Hopefully that's a good sign, and that does not
break VPLL calculation for someone..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nouveau_drv.h
drivers/gpu/drm/nouveau/nv50_calc.c
drivers/gpu/drm/nouveau/nv50_crtc.c
drivers/gpu/drm/nouveau/nva3_pm.c