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(parent: 91f1ee6) | patch
ath9k: Fix ack SIFS time for quarter/half channels
authorWojciech Dubowik <Wojciech.Dubowik@neratec.com>
Tue, 20 Feb 2018 14:42:00 +0000 (15:42 +0100)
committerKalle Valo <kvalo@codeaurora.org>
Tue, 27 Feb 2018 16:47:29 +0000 (18:47 +0200)
commit52c528ffaf1d4697e35c433a6a2ff81c469c967a
tree6a0a15e71e80b049b17f923ae17bb70226888af3tree | snapshot
parent91f1ee65d999a36241cb43bc820b1b59050bc79ecommit | diff
ath9k: Fix ack SIFS time for quarter/half channels

Ack timing generation has to be adapted for 5/10 MHz channels.
Do it by properly initializing ack shift field in TXSIFS
register. Ack shift assumes channel width of 2.5 Mhz so
value zero means 2.5 MHz, 1 is 5 MHz and so on.

Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@neratec.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/ath/ath9k/hw.c diff | blob | history
Domain: System / Kernel;