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[AArch64] Implement ADD in vector registers for 32-bit scalar values. 83/41183/1 accepted/tizen/3.0.2015.q2/common/20150615.160009 accepted/tizen/common/20150615.075705 accepted/tizen/mobile/20150616.010415 accepted/tizen/tv/20150616.010440 accepted/tizen/wearable/20150616.010458 submit/tizen/20150611.133927 submit/tizen_3.0.2015.q2_common/20150615.075539
authorjgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 23 Jun 2014 09:04:40 +0000 (09:04 +0000)
committerNikolai Bozhenov <n.bozhenov@samsung.com>
Thu, 11 Jun 2015 11:07:17 +0000 (14:07 +0300)
commit528553eca1336e3dc570c32c4206c18916465ba1
tree86563c4e4e9a6bdd0d463cdb0467fdd21ea8f31ftree | snapshot
parent0fe7016f84df31ae2ed554bd777d1f13d0fe3f0dcommit | diff
[AArch64] Implement ADD in vector registers for 32-bit scalar values.

git cherry-pick 8412c05c047

gcc/

* config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
vector registers.

gcc/testsuite/

* gcc.target/aarch64/scalar_shift_1.c: Fix expected assembler.

Change-Id: Ib47b8e4a9129322e88f07f08f7fe88b5c6f29322
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211887 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog diff | blob | history
gcc/config/aarch64/aarch64.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c diff | blob | history
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