clk: exynos5420: Set ID for aclk333 gate clock
authorJavier Martinez Canillas <javier@osg.samsung.com>
Tue, 24 May 2016 17:41:01 +0000 (13:41 -0400)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Wed, 14 Dec 2016 04:50:59 +0000 (13:50 +0900)
commit526a85e856b255669815ae5d49c8e32e3cceaa9e
tree5a08646bea21a9fdce90a2e84b6ce4885656f9d0
parent9a0a32036b655784a8538d87d9b85daa0b7f7710
clk: exynos5420: Set ID for aclk333 gate clock

The aclk333 clock needs to be ungated during the MFC power domain switch,
so set the clock ID to allow the Exynos power domain logic to lookup this
clock if is defined in the MFC PD device tree node.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[backport of mainline commit 34cba900375ec1751a87d3655ad03b9a5b022362]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I34cba900375ec1751a87d3655ad03b9a5b022362
drivers/clk/samsung/clk-exynos5420.c