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(parent: 0405ac0) | patch
[RISCV] Remove RISCVISD::BREV8 and use RISCVISD::GREV instead.
authorCraig Topper <craig.topper@sifive.com>
Sun, 30 Jan 2022 06:19:15 +0000 (22:19 -0800)
committerCraig Topper <craig.topper@sifive.com>
Sun, 30 Jan 2022 06:45:43 +0000 (22:45 -0800)
commit524545317c8d7ba049e7a91d8fa7a131f506e2b5
treea50fe78d1840b991b2df9d0489fe953511aa1553tree | snapshot
parent0405ac01509ad232553a81292e2fd5cc50a3e892commit | diff
[RISCV] Remove RISCVISD::BREV8 and use RISCVISD::GREV instead.

We already have an ISD opcode for the more general GREV/GREVI
instructon. We can just use it with the encoding that corresponds
to the behavior of brev8. This is similar to what we do for orc.b
where we use the GORC ISD opcode.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVISelLowering.h diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoZb.td diff | blob | history
Domain: System / Toolchain;